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Update vendors

This commit is contained in:
MZI
2018-10-13 21:45:53 +08:00
parent bf5480b2df
commit db6c162b03
451 changed files with 139580 additions and 42578 deletions

197
vendor/github.com/derekparker/delve/pkg/dwarf/op/op.go generated vendored Normal file
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package op
import (
"bytes"
"encoding/binary"
"errors"
"fmt"
"io"
"github.com/derekparker/delve/pkg/dwarf/util"
)
type Opcode byte
//go:generate go run ../../../scripts/gen-opcodes.go opcodes.table opcodes.go
type stackfn func(Opcode, *context) error
type context struct {
buf *bytes.Buffer
stack []int64
pieces []Piece
reg bool
DwarfRegisters
}
// Piece is a piece of memory stored either at an address or in a register.
type Piece struct {
Size int
Addr int64
RegNum uint64
IsRegister bool
}
// ExecuteStackProgram executes a DWARF location expression and returns
// either an address (int64), or a slice of Pieces for location expressions
// that don't evaluate to an address (such as register and composite expressions).
func ExecuteStackProgram(regs DwarfRegisters, instructions []byte) (int64, []Piece, error) {
ctxt := &context{
buf: bytes.NewBuffer(instructions),
stack: make([]int64, 0, 3),
DwarfRegisters: regs,
}
for {
opcodeByte, err := ctxt.buf.ReadByte()
if err != nil {
break
}
opcode := Opcode(opcodeByte)
if ctxt.reg && opcode != DW_OP_piece {
break
}
fn, ok := oplut[opcode]
if !ok {
return 0, nil, fmt.Errorf("invalid instruction %#v", opcode)
}
err = fn(opcode, ctxt)
if err != nil {
return 0, nil, err
}
}
if ctxt.pieces != nil {
return 0, ctxt.pieces, nil
}
if len(ctxt.stack) == 0 {
return 0, nil, errors.New("empty OP stack")
}
return ctxt.stack[len(ctxt.stack)-1], nil, nil
}
// PrettyPrint prints instructions to out.
func PrettyPrint(out io.Writer, instructions []byte) {
in := bytes.NewBuffer(instructions)
for {
opcode, err := in.ReadByte()
if err != nil {
break
}
if name, hasname := opcodeName[Opcode(opcode)]; hasname {
io.WriteString(out, name)
out.Write([]byte{' '})
} else {
fmt.Fprintf(out, "%#x ", opcode)
}
for _, arg := range opcodeArgs[Opcode(opcode)] {
switch arg {
case 's':
n, _ := util.DecodeSLEB128(in)
fmt.Fprintf(out, "%#x ", n)
case 'u':
n, _ := util.DecodeULEB128(in)
fmt.Fprintf(out, "%#x ", n)
case '1':
var x uint8
binary.Read(in, binary.LittleEndian, &x)
fmt.Fprintf(out, "%#x ", x)
case '2':
var x uint16
binary.Read(in, binary.LittleEndian, &x)
fmt.Fprintf(out, "%#x ", x)
case '4':
var x uint32
binary.Read(in, binary.LittleEndian, &x)
fmt.Fprintf(out, "%#x ", x)
case '8':
var x uint64
binary.Read(in, binary.LittleEndian, &x)
fmt.Fprintf(out, "%#x ", x)
case 'B':
sz, _ := util.DecodeULEB128(in)
data := make([]byte, sz)
sz2, _ := in.Read(data)
data = data[:sz2]
fmt.Fprintf(out, "%d [%x] ", sz, data)
}
}
}
}
func callframecfa(opcode Opcode, ctxt *context) error {
if ctxt.CFA == 0 {
return fmt.Errorf("Could not retrieve CFA for current PC")
}
ctxt.stack = append(ctxt.stack, int64(ctxt.CFA))
return nil
}
func addr(opcode Opcode, ctxt *context) error {
ctxt.stack = append(ctxt.stack, int64(binary.LittleEndian.Uint64(ctxt.buf.Next(8))+ctxt.StaticBase))
return nil
}
func plus(opcode Opcode, ctxt *context) error {
var (
slen = len(ctxt.stack)
digits = ctxt.stack[slen-2 : slen]
st = ctxt.stack[:slen-2]
)
ctxt.stack = append(st, digits[0]+digits[1])
return nil
}
func plusuconsts(opcode Opcode, ctxt *context) error {
slen := len(ctxt.stack)
num, _ := util.DecodeULEB128(ctxt.buf)
ctxt.stack[slen-1] = ctxt.stack[slen-1] + int64(num)
return nil
}
func consts(opcode Opcode, ctxt *context) error {
num, _ := util.DecodeSLEB128(ctxt.buf)
ctxt.stack = append(ctxt.stack, num)
return nil
}
func framebase(opcode Opcode, ctxt *context) error {
num, _ := util.DecodeSLEB128(ctxt.buf)
ctxt.stack = append(ctxt.stack, ctxt.FrameBase+num)
return nil
}
func register(opcode Opcode, ctxt *context) error {
ctxt.reg = true
if opcode == DW_OP_regx {
n, _ := util.DecodeSLEB128(ctxt.buf)
ctxt.pieces = append(ctxt.pieces, Piece{IsRegister: true, RegNum: uint64(n)})
} else {
ctxt.pieces = append(ctxt.pieces, Piece{IsRegister: true, RegNum: uint64(opcode - DW_OP_reg0)})
}
return nil
}
func piece(opcode Opcode, ctxt *context) error {
sz, _ := util.DecodeULEB128(ctxt.buf)
if ctxt.reg {
ctxt.reg = false
ctxt.pieces[len(ctxt.pieces)-1].Size = int(sz)
return nil
}
if len(ctxt.stack) == 0 {
return errors.New("empty OP stack")
}
addr := ctxt.stack[len(ctxt.stack)-1]
ctxt.pieces = append(ctxt.pieces, Piece{Size: int(sz), Addr: addr})
ctxt.stack = ctxt.stack[:0]
return nil
}

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// THIS FILE IS AUTOGENERATED, EDIT opcodes.table INSTEAD
package op
const (
DW_OP_addr Opcode = 0x03
DW_OP_deref Opcode = 0x06
DW_OP_const1u Opcode = 0x08
DW_OP_const1s Opcode = 0x09
DW_OP_const2u Opcode = 0x0a
DW_OP_const2s Opcode = 0x0b
DW_OP_const4u Opcode = 0x0c
DW_OP_const4s Opcode = 0x0d
DW_OP_const8u Opcode = 0x0e
DW_OP_const8s Opcode = 0x0f
DW_OP_constu Opcode = 0x10
DW_OP_consts Opcode = 0x11
DW_OP_dup Opcode = 0x12
DW_OP_drop Opcode = 0x13
DW_OP_over Opcode = 0x14
DW_OP_pick Opcode = 0x15
DW_OP_swap Opcode = 0x16
DW_OP_rot Opcode = 0x17
DW_OP_xderef Opcode = 0x18
DW_OP_abs Opcode = 0x19
DW_OP_and Opcode = 0x1a
DW_OP_div Opcode = 0x1b
DW_OP_minus Opcode = 0x1c
DW_OP_mod Opcode = 0x1d
DW_OP_mul Opcode = 0x1e
DW_OP_neg Opcode = 0x1f
DW_OP_not Opcode = 0x20
DW_OP_or Opcode = 0x21
DW_OP_plus Opcode = 0x22
DW_OP_plus_uconst Opcode = 0x23
DW_OP_shl Opcode = 0x24
DW_OP_shr Opcode = 0x25
DW_OP_shra Opcode = 0x26
DW_OP_xor Opcode = 0x27
DW_OP_bra Opcode = 0x28
DW_OP_eq Opcode = 0x29
DW_OP_ge Opcode = 0x2a
DW_OP_gt Opcode = 0x2b
DW_OP_le Opcode = 0x2c
DW_OP_lt Opcode = 0x2d
DW_OP_ne Opcode = 0x2e
DW_OP_skip Opcode = 0x2f
DW_OP_lit0 Opcode = 0x30
DW_OP_lit1 Opcode = 0x31
DW_OP_lit2 Opcode = 0x32
DW_OP_lit3 Opcode = 0x33
DW_OP_lit4 Opcode = 0x34
DW_OP_lit5 Opcode = 0x35
DW_OP_lit6 Opcode = 0x36
DW_OP_lit7 Opcode = 0x37
DW_OP_lit8 Opcode = 0x38
DW_OP_lit9 Opcode = 0x39
DW_OP_lit10 Opcode = 0x3a
DW_OP_lit11 Opcode = 0x3b
DW_OP_lit12 Opcode = 0x3c
DW_OP_lit13 Opcode = 0x3d
DW_OP_lit14 Opcode = 0x3e
DW_OP_lit15 Opcode = 0x3f
DW_OP_lit16 Opcode = 0x40
DW_OP_lit17 Opcode = 0x41
DW_OP_lit18 Opcode = 0x42
DW_OP_lit19 Opcode = 0x43
DW_OP_lit20 Opcode = 0x44
DW_OP_lit21 Opcode = 0x45
DW_OP_lit22 Opcode = 0x46
DW_OP_lit23 Opcode = 0x47
DW_OP_lit24 Opcode = 0x48
DW_OP_lit25 Opcode = 0x49
DW_OP_lit26 Opcode = 0x4a
DW_OP_lit27 Opcode = 0x4b
DW_OP_lit28 Opcode = 0x4c
DW_OP_lit29 Opcode = 0x4d
DW_OP_lit30 Opcode = 0x4e
DW_OP_lit31 Opcode = 0x4f
DW_OP_reg0 Opcode = 0x50
DW_OP_reg1 Opcode = 0x51
DW_OP_reg2 Opcode = 0x52
DW_OP_reg3 Opcode = 0x53
DW_OP_reg4 Opcode = 0x54
DW_OP_reg5 Opcode = 0x55
DW_OP_reg6 Opcode = 0x56
DW_OP_reg7 Opcode = 0x57
DW_OP_reg8 Opcode = 0x58
DW_OP_reg9 Opcode = 0x59
DW_OP_reg10 Opcode = 0x5a
DW_OP_reg11 Opcode = 0x5b
DW_OP_reg12 Opcode = 0x5c
DW_OP_reg13 Opcode = 0x5d
DW_OP_reg14 Opcode = 0x5e
DW_OP_reg15 Opcode = 0x5f
DW_OP_reg16 Opcode = 0x60
DW_OP_reg17 Opcode = 0x61
DW_OP_reg18 Opcode = 0x62
DW_OP_reg19 Opcode = 0x63
DW_OP_reg20 Opcode = 0x64
DW_OP_reg21 Opcode = 0x65
DW_OP_reg22 Opcode = 0x66
DW_OP_reg23 Opcode = 0x67
DW_OP_reg24 Opcode = 0x68
DW_OP_reg25 Opcode = 0x69
DW_OP_reg26 Opcode = 0x6a
DW_OP_reg27 Opcode = 0x6b
DW_OP_reg28 Opcode = 0x6c
DW_OP_reg29 Opcode = 0x6d
DW_OP_reg30 Opcode = 0x6e
DW_OP_reg31 Opcode = 0x6f
DW_OP_breg0 Opcode = 0x70
DW_OP_breg1 Opcode = 0x71
DW_OP_breg2 Opcode = 0x72
DW_OP_breg3 Opcode = 0x73
DW_OP_breg4 Opcode = 0x74
DW_OP_breg5 Opcode = 0x75
DW_OP_breg6 Opcode = 0x76
DW_OP_breg7 Opcode = 0x77
DW_OP_breg8 Opcode = 0x78
DW_OP_breg9 Opcode = 0x79
DW_OP_breg10 Opcode = 0x7a
DW_OP_breg11 Opcode = 0x7b
DW_OP_breg12 Opcode = 0x7c
DW_OP_breg13 Opcode = 0x7d
DW_OP_breg14 Opcode = 0x7e
DW_OP_breg15 Opcode = 0x7f
DW_OP_breg16 Opcode = 0x80
DW_OP_breg17 Opcode = 0x81
DW_OP_breg18 Opcode = 0x82
DW_OP_breg19 Opcode = 0x83
DW_OP_breg20 Opcode = 0x84
DW_OP_breg21 Opcode = 0x85
DW_OP_breg22 Opcode = 0x86
DW_OP_breg23 Opcode = 0x87
DW_OP_breg24 Opcode = 0x88
DW_OP_breg25 Opcode = 0x89
DW_OP_breg26 Opcode = 0x8a
DW_OP_breg27 Opcode = 0x8b
DW_OP_breg28 Opcode = 0x8c
DW_OP_breg29 Opcode = 0x8d
DW_OP_breg30 Opcode = 0x8e
DW_OP_breg31 Opcode = 0x8f
DW_OP_regx Opcode = 0x90
DW_OP_fbreg Opcode = 0x91
DW_OP_bregx Opcode = 0x92
DW_OP_piece Opcode = 0x93
DW_OP_deref_size Opcode = 0x94
DW_OP_xderef_size Opcode = 0x95
DW_OP_nop Opcode = 0x96
DW_OP_push_object_address Opcode = 0x97
DW_OP_call2 Opcode = 0x98
DW_OP_call4 Opcode = 0x99
DW_OP_call_ref Opcode = 0x9a
DW_OP_form_tls_address Opcode = 0x9b
DW_OP_call_frame_cfa Opcode = 0x9c
DW_OP_bit_piece Opcode = 0x9d
DW_OP_implicit_value Opcode = 0x9e
DW_OP_stack_value Opcode = 0x9f
)
var opcodeName = map[Opcode]string{
DW_OP_addr: "DW_OP_addr",
DW_OP_deref: "DW_OP_deref",
DW_OP_const1u: "DW_OP_const1u",
DW_OP_const1s: "DW_OP_const1s",
DW_OP_const2u: "DW_OP_const2u",
DW_OP_const2s: "DW_OP_const2s",
DW_OP_const4u: "DW_OP_const4u",
DW_OP_const4s: "DW_OP_const4s",
DW_OP_const8u: "DW_OP_const8u",
DW_OP_const8s: "DW_OP_const8s",
DW_OP_constu: "DW_OP_constu",
DW_OP_consts: "DW_OP_consts",
DW_OP_dup: "DW_OP_dup",
DW_OP_drop: "DW_OP_drop",
DW_OP_over: "DW_OP_over",
DW_OP_pick: "DW_OP_pick",
DW_OP_swap: "DW_OP_swap",
DW_OP_rot: "DW_OP_rot",
DW_OP_xderef: "DW_OP_xderef",
DW_OP_abs: "DW_OP_abs",
DW_OP_and: "DW_OP_and",
DW_OP_div: "DW_OP_div",
DW_OP_minus: "DW_OP_minus",
DW_OP_mod: "DW_OP_mod",
DW_OP_mul: "DW_OP_mul",
DW_OP_neg: "DW_OP_neg",
DW_OP_not: "DW_OP_not",
DW_OP_or: "DW_OP_or",
DW_OP_plus: "DW_OP_plus",
DW_OP_plus_uconst: "DW_OP_plus_uconst",
DW_OP_shl: "DW_OP_shl",
DW_OP_shr: "DW_OP_shr",
DW_OP_shra: "DW_OP_shra",
DW_OP_xor: "DW_OP_xor",
DW_OP_bra: "DW_OP_bra",
DW_OP_eq: "DW_OP_eq",
DW_OP_ge: "DW_OP_ge",
DW_OP_gt: "DW_OP_gt",
DW_OP_le: "DW_OP_le",
DW_OP_lt: "DW_OP_lt",
DW_OP_ne: "DW_OP_ne",
DW_OP_skip: "DW_OP_skip",
DW_OP_lit0: "DW_OP_lit0",
DW_OP_lit1: "DW_OP_lit1",
DW_OP_lit2: "DW_OP_lit2",
DW_OP_lit3: "DW_OP_lit3",
DW_OP_lit4: "DW_OP_lit4",
DW_OP_lit5: "DW_OP_lit5",
DW_OP_lit6: "DW_OP_lit6",
DW_OP_lit7: "DW_OP_lit7",
DW_OP_lit8: "DW_OP_lit8",
DW_OP_lit9: "DW_OP_lit9",
DW_OP_lit10: "DW_OP_lit10",
DW_OP_lit11: "DW_OP_lit11",
DW_OP_lit12: "DW_OP_lit12",
DW_OP_lit13: "DW_OP_lit13",
DW_OP_lit14: "DW_OP_lit14",
DW_OP_lit15: "DW_OP_lit15",
DW_OP_lit16: "DW_OP_lit16",
DW_OP_lit17: "DW_OP_lit17",
DW_OP_lit18: "DW_OP_lit18",
DW_OP_lit19: "DW_OP_lit19",
DW_OP_lit20: "DW_OP_lit20",
DW_OP_lit21: "DW_OP_lit21",
DW_OP_lit22: "DW_OP_lit22",
DW_OP_lit23: "DW_OP_lit23",
DW_OP_lit24: "DW_OP_lit24",
DW_OP_lit25: "DW_OP_lit25",
DW_OP_lit26: "DW_OP_lit26",
DW_OP_lit27: "DW_OP_lit27",
DW_OP_lit28: "DW_OP_lit28",
DW_OP_lit29: "DW_OP_lit29",
DW_OP_lit30: "DW_OP_lit30",
DW_OP_lit31: "DW_OP_lit31",
DW_OP_reg0: "DW_OP_reg0",
DW_OP_reg1: "DW_OP_reg1",
DW_OP_reg2: "DW_OP_reg2",
DW_OP_reg3: "DW_OP_reg3",
DW_OP_reg4: "DW_OP_reg4",
DW_OP_reg5: "DW_OP_reg5",
DW_OP_reg6: "DW_OP_reg6",
DW_OP_reg7: "DW_OP_reg7",
DW_OP_reg8: "DW_OP_reg8",
DW_OP_reg9: "DW_OP_reg9",
DW_OP_reg10: "DW_OP_reg10",
DW_OP_reg11: "DW_OP_reg11",
DW_OP_reg12: "DW_OP_reg12",
DW_OP_reg13: "DW_OP_reg13",
DW_OP_reg14: "DW_OP_reg14",
DW_OP_reg15: "DW_OP_reg15",
DW_OP_reg16: "DW_OP_reg16",
DW_OP_reg17: "DW_OP_reg17",
DW_OP_reg18: "DW_OP_reg18",
DW_OP_reg19: "DW_OP_reg19",
DW_OP_reg20: "DW_OP_reg20",
DW_OP_reg21: "DW_OP_reg21",
DW_OP_reg22: "DW_OP_reg22",
DW_OP_reg23: "DW_OP_reg23",
DW_OP_reg24: "DW_OP_reg24",
DW_OP_reg25: "DW_OP_reg25",
DW_OP_reg26: "DW_OP_reg26",
DW_OP_reg27: "DW_OP_reg27",
DW_OP_reg28: "DW_OP_reg28",
DW_OP_reg29: "DW_OP_reg29",
DW_OP_reg30: "DW_OP_reg30",
DW_OP_reg31: "DW_OP_reg31",
DW_OP_breg0: "DW_OP_breg0",
DW_OP_breg1: "DW_OP_breg1",
DW_OP_breg2: "DW_OP_breg2",
DW_OP_breg3: "DW_OP_breg3",
DW_OP_breg4: "DW_OP_breg4",
DW_OP_breg5: "DW_OP_breg5",
DW_OP_breg6: "DW_OP_breg6",
DW_OP_breg7: "DW_OP_breg7",
DW_OP_breg8: "DW_OP_breg8",
DW_OP_breg9: "DW_OP_breg9",
DW_OP_breg10: "DW_OP_breg10",
DW_OP_breg11: "DW_OP_breg11",
DW_OP_breg12: "DW_OP_breg12",
DW_OP_breg13: "DW_OP_breg13",
DW_OP_breg14: "DW_OP_breg14",
DW_OP_breg15: "DW_OP_breg15",
DW_OP_breg16: "DW_OP_breg16",
DW_OP_breg17: "DW_OP_breg17",
DW_OP_breg18: "DW_OP_breg18",
DW_OP_breg19: "DW_OP_breg19",
DW_OP_breg20: "DW_OP_breg20",
DW_OP_breg21: "DW_OP_breg21",
DW_OP_breg22: "DW_OP_breg22",
DW_OP_breg23: "DW_OP_breg23",
DW_OP_breg24: "DW_OP_breg24",
DW_OP_breg25: "DW_OP_breg25",
DW_OP_breg26: "DW_OP_breg26",
DW_OP_breg27: "DW_OP_breg27",
DW_OP_breg28: "DW_OP_breg28",
DW_OP_breg29: "DW_OP_breg29",
DW_OP_breg30: "DW_OP_breg30",
DW_OP_breg31: "DW_OP_breg31",
DW_OP_regx: "DW_OP_regx",
DW_OP_fbreg: "DW_OP_fbreg",
DW_OP_bregx: "DW_OP_bregx",
DW_OP_piece: "DW_OP_piece",
DW_OP_deref_size: "DW_OP_deref_size",
DW_OP_xderef_size: "DW_OP_xderef_size",
DW_OP_nop: "DW_OP_nop",
DW_OP_push_object_address: "DW_OP_push_object_address",
DW_OP_call2: "DW_OP_call2",
DW_OP_call4: "DW_OP_call4",
DW_OP_call_ref: "DW_OP_call_ref",
DW_OP_form_tls_address: "DW_OP_form_tls_address",
DW_OP_call_frame_cfa: "DW_OP_call_frame_cfa",
DW_OP_bit_piece: "DW_OP_bit_piece",
DW_OP_implicit_value: "DW_OP_implicit_value",
DW_OP_stack_value: "DW_OP_stack_value",
}
var opcodeArgs = map[Opcode]string{
DW_OP_addr: "8",
DW_OP_deref: "",
DW_OP_const1u: "1",
DW_OP_const1s: "1",
DW_OP_const2u: "2",
DW_OP_const2s: "2",
DW_OP_const4u: "4",
DW_OP_const4s: "4",
DW_OP_const8u: "8",
DW_OP_const8s: "8",
DW_OP_constu: "u",
DW_OP_consts: "s",
DW_OP_dup: "",
DW_OP_drop: "",
DW_OP_over: "",
DW_OP_pick: "",
DW_OP_swap: "",
DW_OP_rot: "",
DW_OP_xderef: "",
DW_OP_abs: "",
DW_OP_and: "",
DW_OP_div: "",
DW_OP_minus: "",
DW_OP_mod: "",
DW_OP_mul: "",
DW_OP_neg: "",
DW_OP_not: "",
DW_OP_or: "",
DW_OP_plus: "",
DW_OP_plus_uconst: "u",
DW_OP_shl: "",
DW_OP_shr: "",
DW_OP_shra: "",
DW_OP_xor: "",
DW_OP_bra: "2",
DW_OP_eq: "",
DW_OP_ge: "",
DW_OP_gt: "",
DW_OP_le: "",
DW_OP_lt: "",
DW_OP_ne: "",
DW_OP_skip: "2",
DW_OP_lit0: "",
DW_OP_lit1: "",
DW_OP_lit2: "",
DW_OP_lit3: "",
DW_OP_lit4: "",
DW_OP_lit5: "",
DW_OP_lit6: "",
DW_OP_lit7: "",
DW_OP_lit8: "",
DW_OP_lit9: "",
DW_OP_lit10: "",
DW_OP_lit11: "",
DW_OP_lit12: "",
DW_OP_lit13: "",
DW_OP_lit14: "",
DW_OP_lit15: "",
DW_OP_lit16: "",
DW_OP_lit17: "",
DW_OP_lit18: "",
DW_OP_lit19: "",
DW_OP_lit20: "",
DW_OP_lit21: "",
DW_OP_lit22: "",
DW_OP_lit23: "",
DW_OP_lit24: "",
DW_OP_lit25: "",
DW_OP_lit26: "",
DW_OP_lit27: "",
DW_OP_lit28: "",
DW_OP_lit29: "",
DW_OP_lit30: "",
DW_OP_lit31: "",
DW_OP_reg0: "",
DW_OP_reg1: "",
DW_OP_reg2: "",
DW_OP_reg3: "",
DW_OP_reg4: "",
DW_OP_reg5: "",
DW_OP_reg6: "",
DW_OP_reg7: "",
DW_OP_reg8: "",
DW_OP_reg9: "",
DW_OP_reg10: "",
DW_OP_reg11: "",
DW_OP_reg12: "",
DW_OP_reg13: "",
DW_OP_reg14: "",
DW_OP_reg15: "",
DW_OP_reg16: "",
DW_OP_reg17: "",
DW_OP_reg18: "",
DW_OP_reg19: "",
DW_OP_reg20: "",
DW_OP_reg21: "",
DW_OP_reg22: "",
DW_OP_reg23: "",
DW_OP_reg24: "",
DW_OP_reg25: "",
DW_OP_reg26: "",
DW_OP_reg27: "",
DW_OP_reg28: "",
DW_OP_reg29: "",
DW_OP_reg30: "",
DW_OP_reg31: "",
DW_OP_breg0: "s",
DW_OP_breg1: "s",
DW_OP_breg2: "s",
DW_OP_breg3: "s",
DW_OP_breg4: "s",
DW_OP_breg5: "s",
DW_OP_breg6: "s",
DW_OP_breg7: "s",
DW_OP_breg8: "s",
DW_OP_breg9: "s",
DW_OP_breg10: "s",
DW_OP_breg11: "s",
DW_OP_breg12: "s",
DW_OP_breg13: "s",
DW_OP_breg14: "s",
DW_OP_breg15: "s",
DW_OP_breg16: "s",
DW_OP_breg17: "s",
DW_OP_breg18: "s",
DW_OP_breg19: "s",
DW_OP_breg20: "s",
DW_OP_breg21: "s",
DW_OP_breg22: "s",
DW_OP_breg23: "s",
DW_OP_breg24: "s",
DW_OP_breg25: "s",
DW_OP_breg26: "s",
DW_OP_breg27: "s",
DW_OP_breg28: "s",
DW_OP_breg29: "s",
DW_OP_breg30: "s",
DW_OP_breg31: "s",
DW_OP_regx: "s",
DW_OP_fbreg: "s",
DW_OP_bregx: "us",
DW_OP_piece: "u",
DW_OP_deref_size: "1",
DW_OP_xderef_size: "1",
DW_OP_nop: "",
DW_OP_push_object_address: "",
DW_OP_call2: "2",
DW_OP_call4: "4",
DW_OP_call_ref: "4",
DW_OP_form_tls_address: "",
DW_OP_call_frame_cfa: "",
DW_OP_bit_piece: "uu",
DW_OP_implicit_value: "B",
DW_OP_stack_value: "",
}
var oplut = map[Opcode]stackfn{
DW_OP_addr: addr,
DW_OP_consts: consts,
DW_OP_plus: plus,
DW_OP_plus_uconst: plusuconsts,
DW_OP_reg0: register,
DW_OP_reg1: register,
DW_OP_reg2: register,
DW_OP_reg3: register,
DW_OP_reg4: register,
DW_OP_reg5: register,
DW_OP_reg6: register,
DW_OP_reg7: register,
DW_OP_reg8: register,
DW_OP_reg9: register,
DW_OP_reg10: register,
DW_OP_reg11: register,
DW_OP_reg12: register,
DW_OP_reg13: register,
DW_OP_reg14: register,
DW_OP_reg15: register,
DW_OP_reg16: register,
DW_OP_reg17: register,
DW_OP_reg18: register,
DW_OP_reg19: register,
DW_OP_reg20: register,
DW_OP_reg21: register,
DW_OP_reg22: register,
DW_OP_reg23: register,
DW_OP_reg24: register,
DW_OP_reg25: register,
DW_OP_reg26: register,
DW_OP_reg27: register,
DW_OP_reg28: register,
DW_OP_reg29: register,
DW_OP_reg30: register,
DW_OP_reg31: register,
DW_OP_regx: register,
DW_OP_fbreg: framebase,
DW_OP_piece: piece,
DW_OP_call_frame_cfa: callframecfa,
}

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@ -0,0 +1,175 @@
// This file is used by scripts/gen-opcodes.go to generate
// pkg/dwarf/op/opcodes.go
// Lines starting with // are comments and will be discarded.
// Non empty lines contain the following tab separated fields:
//
// <opcode name> <opcode code> <arguments> <function name>
//
// With the last column, <function name>, being optional.
//
// The arguments field should contain a string with one character for each
// argument of the opcode:
//
// s signed variable length integer
// u unsigned variable length integer
// 1 one byte unsigned integer
// 2 two bytes unsigned integer
// 4 four bytes unsigned integer
// 8 eight bytes unsigned integer
// B an unsigned variable length integer 'n' followed by n a block of n bytes
DW_OP_addr 0x03 "8" addr
DW_OP_deref 0x06 ""
DW_OP_const1u 0x08 "1"
DW_OP_const1s 0x09 "1"
DW_OP_const2u 0x0a "2"
DW_OP_const2s 0x0b "2"
DW_OP_const4u 0x0c "4"
DW_OP_const4s 0x0d "4"
DW_OP_const8u 0x0e "8"
DW_OP_const8s 0x0f "8"
DW_OP_constu 0x10 "u"
DW_OP_consts 0x11 "s" consts
DW_OP_dup 0x12 ""
DW_OP_drop 0x13 ""
DW_OP_over 0x14 ""
DW_OP_pick 0x15 ""
DW_OP_swap 0x16 ""
DW_OP_rot 0x17 ""
DW_OP_xderef 0x18 ""
DW_OP_abs 0x19 ""
DW_OP_and 0x1a ""
DW_OP_div 0x1b ""
DW_OP_minus 0x1c ""
DW_OP_mod 0x1d ""
DW_OP_mul 0x1e ""
DW_OP_neg 0x1f ""
DW_OP_not 0x20 ""
DW_OP_or 0x21 ""
DW_OP_plus 0x22 "" plus
DW_OP_plus_uconst 0x23 "u" plusuconsts
DW_OP_shl 0x24 ""
DW_OP_shr 0x25 ""
DW_OP_shra 0x26 ""
DW_OP_xor 0x27 ""
DW_OP_bra 0x28 "2"
DW_OP_eq 0x29 ""
DW_OP_ge 0x2a ""
DW_OP_gt 0x2b ""
DW_OP_le 0x2c ""
DW_OP_lt 0x2d ""
DW_OP_ne 0x2e ""
DW_OP_skip 0x2f "2"
DW_OP_lit0 0x30 ""
DW_OP_lit1 0x31 ""
DW_OP_lit2 0x32 ""
DW_OP_lit3 0x33 ""
DW_OP_lit4 0x34 ""
DW_OP_lit5 0x35 ""
DW_OP_lit6 0x36 ""
DW_OP_lit7 0x37 ""
DW_OP_lit8 0x38 ""
DW_OP_lit9 0x39 ""
DW_OP_lit10 0x3a ""
DW_OP_lit11 0x3b ""
DW_OP_lit12 0x3c ""
DW_OP_lit13 0x3d ""
DW_OP_lit14 0x3e ""
DW_OP_lit15 0x3f ""
DW_OP_lit16 0x40 ""
DW_OP_lit17 0x41 ""
DW_OP_lit18 0x42 ""
DW_OP_lit19 0x43 ""
DW_OP_lit20 0x44 ""
DW_OP_lit21 0x45 ""
DW_OP_lit22 0x46 ""
DW_OP_lit23 0x47 ""
DW_OP_lit24 0x48 ""
DW_OP_lit25 0x49 ""
DW_OP_lit26 0x4a ""
DW_OP_lit27 0x4b ""
DW_OP_lit28 0x4c ""
DW_OP_lit29 0x4d ""
DW_OP_lit30 0x4e ""
DW_OP_lit31 0x4f ""
DW_OP_reg0 0x50 "" register
DW_OP_reg1 0x51 "" register
DW_OP_reg2 0x52 "" register
DW_OP_reg3 0x53 "" register
DW_OP_reg4 0x54 "" register
DW_OP_reg5 0x55 "" register
DW_OP_reg6 0x56 "" register
DW_OP_reg7 0x57 "" register
DW_OP_reg8 0x58 "" register
DW_OP_reg9 0x59 "" register
DW_OP_reg10 0x5a "" register
DW_OP_reg11 0x5b "" register
DW_OP_reg12 0x5c "" register
DW_OP_reg13 0x5d "" register
DW_OP_reg14 0x5e "" register
DW_OP_reg15 0x5f "" register
DW_OP_reg16 0x60 "" register
DW_OP_reg17 0x61 "" register
DW_OP_reg18 0x62 "" register
DW_OP_reg19 0x63 "" register
DW_OP_reg20 0x64 "" register
DW_OP_reg21 0x65 "" register
DW_OP_reg22 0x66 "" register
DW_OP_reg23 0x67 "" register
DW_OP_reg24 0x68 "" register
DW_OP_reg25 0x69 "" register
DW_OP_reg26 0x6a "" register
DW_OP_reg27 0x6b "" register
DW_OP_reg28 0x6c "" register
DW_OP_reg29 0x6d "" register
DW_OP_reg30 0x6e "" register
DW_OP_reg31 0x6f "" register
DW_OP_breg0 0x70 "s"
DW_OP_breg1 0x71 "s"
DW_OP_breg2 0x72 "s"
DW_OP_breg3 0x73 "s"
DW_OP_breg4 0x74 "s"
DW_OP_breg5 0x75 "s"
DW_OP_breg6 0x76 "s"
DW_OP_breg7 0x77 "s"
DW_OP_breg8 0x78 "s"
DW_OP_breg9 0x79 "s"
DW_OP_breg10 0x7a "s"
DW_OP_breg11 0x7b "s"
DW_OP_breg12 0x7c "s"
DW_OP_breg13 0x7d "s"
DW_OP_breg14 0x7e "s"
DW_OP_breg15 0x7f "s"
DW_OP_breg16 0x80 "s"
DW_OP_breg17 0x81 "s"
DW_OP_breg18 0x82 "s"
DW_OP_breg19 0x83 "s"
DW_OP_breg20 0x84 "s"
DW_OP_breg21 0x85 "s"
DW_OP_breg22 0x86 "s"
DW_OP_breg23 0x87 "s"
DW_OP_breg24 0x88 "s"
DW_OP_breg25 0x89 "s"
DW_OP_breg26 0x8a "s"
DW_OP_breg27 0x8b "s"
DW_OP_breg28 0x8c "s"
DW_OP_breg29 0x8d "s"
DW_OP_breg30 0x8e "s"
DW_OP_breg31 0x8f "s"
DW_OP_regx 0x90 "s" register
DW_OP_fbreg 0x91 "s" framebase
DW_OP_bregx 0x92 "us"
DW_OP_piece 0x93 "u" piece
DW_OP_deref_size 0x94 "1"
DW_OP_xderef_size 0x95 "1"
DW_OP_nop 0x96 ""
DW_OP_push_object_address 0x97 ""
DW_OP_call2 0x98 "2"
DW_OP_call4 0x99 "4"
DW_OP_call_ref 0x9a "4"
DW_OP_form_tls_address 0x9b ""
DW_OP_call_frame_cfa 0x9c "" callframecfa
DW_OP_bit_piece 0x9d "uu"
DW_OP_implicit_value 0x9e "B"
DW_OP_stack_value 0x9f ""

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@ -0,0 +1,102 @@
package op
import (
"bytes"
"encoding/binary"
)
type DwarfRegisters struct {
StaticBase uint64
CFA int64
FrameBase int64
ObjBase int64
Regs []*DwarfRegister
ByteOrder binary.ByteOrder
PCRegNum uint64
SPRegNum uint64
BPRegNum uint64
}
type DwarfRegister struct {
Uint64Val uint64
Bytes []byte
}
// Uint64Val returns the uint64 value of register idx.
func (regs *DwarfRegisters) Uint64Val(idx uint64) uint64 {
reg := regs.Reg(idx)
if reg == nil {
return 0
}
return regs.Regs[idx].Uint64Val
}
// Bytes returns the bytes value of register idx, nil if the register is not
// defined.
func (regs *DwarfRegisters) Bytes(idx uint64) []byte {
reg := regs.Reg(idx)
if reg == nil {
return nil
}
if reg.Bytes == nil {
var buf bytes.Buffer
binary.Write(&buf, regs.ByteOrder, reg.Uint64Val)
reg.Bytes = buf.Bytes()
}
return reg.Bytes
}
// Reg returns register idx or nil if the register is not defined.
func (regs *DwarfRegisters) Reg(idx uint64) *DwarfRegister {
if idx >= uint64(len(regs.Regs)) {
return nil
}
return regs.Regs[idx]
}
func (regs *DwarfRegisters) PC() uint64 {
return regs.Uint64Val(regs.PCRegNum)
}
func (regs *DwarfRegisters) SP() uint64 {
return regs.Uint64Val(regs.SPRegNum)
}
func (regs *DwarfRegisters) BP() uint64 {
return regs.Uint64Val(regs.BPRegNum)
}
// AddReg adds register idx to regs.
func (regs *DwarfRegisters) AddReg(idx uint64, reg *DwarfRegister) {
if idx >= uint64(len(regs.Regs)) {
newRegs := make([]*DwarfRegister, idx+1)
copy(newRegs, regs.Regs)
regs.Regs = newRegs
}
regs.Regs[idx] = reg
}
func DwarfRegisterFromUint64(v uint64) *DwarfRegister {
return &DwarfRegister{Uint64Val: v}
}
func DwarfRegisterFromBytes(bytes []byte) *DwarfRegister {
var v uint64
switch len(bytes) {
case 1:
v = uint64(bytes[0])
case 2:
x := binary.LittleEndian.Uint16(bytes)
v = uint64(x)
case 4:
x := binary.LittleEndian.Uint32(bytes)
v = uint64(x)
default:
if len(bytes) >= 8 {
v = binary.LittleEndian.Uint64(bytes[:8])
}
}
return &DwarfRegister{Uint64Val: v, Bytes: bytes}
}